1. Field of the Invention
The invention relates to semiconductor substrate processing, and more particularly, to a method for improved handling and processing of a semiconductor wafer in a sputter etch process system.
2. Description of the Background Art
Semiconductor processing typically is carried out in specialized apparatus comprised of multiple chambers wherein wafers are processed by the deposition and various treatments of multiple layers of semiconductor material in a single environment. The plurality of processing chambers and preparatory chambers are strategically arranged to process substrates (i.e., semiconductor wafers) through a plurality of sequential steps to produce integrated circuits.
Plasma-based reaction chambers have become increasingly utilized in such specialized apparatus, providing for precisely controlled thin-film etchings and depositions. For example, in an inductively coupled plasma source (IPS) sputter etch chamber, a plasma is used to initiate wafer processing conditions. In such a chamber, a pedestal supports an electrostatic chuck and also functions as an RF powered cathode. The chamber walls typically form an RF anode. The electrostatic chuck (e.g., a ceramic electrostatic chuck) creates an electrostatic attractive force to retain the wafer in a stationary position during processing. A voltage is applied to one or more electrodes imbedded within a ceramic chuck body so as to induce opposite polarity charges in the wafer and electrodes, respectively. The opposite charges pull the wafer against the chuck support surface, thereby electrostatically clamping the wafer.
An additional coil on the outside surface of the IPS chamber lid is energized with RF power that inductively couples through the lid and into the chamber. The electric field generated between the anode and cathode along with the inductively coupled power from coil ionizes a reactant gas introduced into the chamber to produce the plasma. Ions from the plasma bombard the wafer to create (etch) a desired pattern.
Electrically biasing the pedestal and wafer as a cathode enhances the wafer process; however, it also creates certain undesirable conditions afterwards. Particularly, wafers with relatively thick (e.g., 1 .mu.m) oxide coatings will tend to accumulate charges during processing. The charges are primarily RF induced, and it is believed that they are trapped by the electrostatic chucking forces that retain the wafer. As such, the wafer is retained by the chuck to some degree even after the chucking voltage is removed. The wafer must then be mechanically forced from the pedestal which leads to breakage or particle formation; neither of which is desirable.
A second problem are the electrical transients that travel through the wafer (again as a result of the RF power). These transients cause the wafer to locally alter its bias thereby weakening or totally repelling the chucking force. Accumulated charges are detrimental because they reduce the available chucking force for retaining a wafer. This condition, in turn, results in poor process conditions. For example, a reduced chucking force can contribute to a non-uniform backside gas pressure under the wafer. Such unequal forces cause wafer shifting or pop-off and compromises temperature control which results in poor etch process conditions or particle contamination.
Therefore, a need exists in the art for a method of properly controlling the process parameters of a sputter etch wafer process to reduce the likelihood of residual charge retention in the substrate and allow for improved dechucking of same.